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77 lines
1.3 KiB
ArmAsm
77 lines
1.3 KiB
ArmAsm
# Control transfer instructions
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#include "../helper.S"
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START_TEST
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j unconditional
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FAIL
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unconditional:
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# Test branching instructions
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li t0, 10
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li t1, 10
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beq t0, t1, branch2
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FAIL
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branch2:
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bge t0, t1, branch3
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FAIL
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branch3:
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bne t0, t1, fail
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blt t0, t1, fail
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bltu t0, t1, fail
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li t0, -1
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li t1, 1
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blt t1, t0, fail
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bltu t0, t1, fail
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bge t0, t1, fail
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bgeu t1, t0, fail
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blt t0, t1, branch4
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FAIL
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branch4:
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bltu t1, t0, branch5
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FAIL
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branch5:
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bge t1, t0, branch6
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FAIL
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branch6:
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bgeu t0, t1, branch7
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FAIL
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branch7:
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# Backwards jal
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li t0, 0
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backwards:
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li t1, 0
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bne t0, t1, end_backwards
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li t0, 1
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jal backwards
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end_backwards:
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# Test link registers being set correctly:
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auipc t1, 0
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jal t0, link2
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jal t5, fail # force uncompressed
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link2:
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addi t1, t1, 8 # the instruction following the jump
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bne t1, t0, fail
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auipc t1, 0
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jalr t0, 12(t1) # 12 is the three instructions, so to the addi
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jal t5, fail # force uncompressed
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addi t1, t1, 8 # the instruction following the jump
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bne t0, t1, fail
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# Test a loop (t0=counter, t1=expected)
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li t0, 0
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li t1, 100
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loop1:
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addi t0, t0, 1
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blt t0, t1, loop1
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ASSERT_EQ t0, 100
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# End
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PASS
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